Pixel 10 and 11 chip details revealed in a Google leak

Ever since Google switched to its custom Tensor chips in its Pixel series, some have complained about the mediocre battery life and poor thermals they provided. This was largely due to Google’s decision to have Samsung (more specifically, its S.LSI division) handle many parts of the chip-making process, including manufacturing. In short, Samsung’s recent process nodes tend to underperform those of its rival TSMC.

Fortunately, Google will soon rectify this mistake by ditching Samsung and designing its next chips in-house. Because of this, Google will also eventually switch to TSMC, which we confirmed earlier. However, one thing that was not clear about it was what exact process would be used. Today we can answer that question, not only for the Pixel 10 Tensor G5, but also for the Tensor G6!

Thanks to an unprecedented leak from Google’s gChips division, Android Authority has seen credible documents confirming the new process nodes for Google’s upcoming chips.

No 2nm, but still a big upgrade

Google Tensor G5 (codenamed “lagoon”), likely the chip in next year’s Pixel 10 series, will be manufactured on TSMC’s 3nm class N3E, the exact same process node used by Apple for the A18 Pro from the iPhone 16 Pro and its M4. chips This is great news because it’s probably the best process node available today and will certainly be a massive upgrade over Samsung’s 4nm class 4LPE node used in the Tensor G4, both in efficiency and performance.

Probably the most interesting part of this leak, however, is the fact that the 2026 Tensor G6 (codenamed “malibu”) will be manufactured on TSMC’s upcoming N3P node, the same one rumored to be used for the chip A19 from Apple. While it’s still a 3nm-class node, it brings some improvements: the docs we saw contained a chart summarizing the changes. We cannot share the original page. However, we recreated it below:

This can be a little confusing, so let me give some additional context: PPA stands for “Power, Performance, Area,” the three key components of any process node. The “Freq (@iso-lkg)” figure, with a 5% improvement, shows how much the frequency can be increased (which translates almost directly into performance) without affecting other characteristics of the chip (in this case , leaks, which are too complex a concept to explain here). The second number is “Power (@iso-freq)”, which shows how much power use can be reduced if the frequency remains the same, in this case by 7%. It is important to know that these two values ​​are not additive, but an improved frequency or power usage. The last value (“Area”) shows how much smaller a finished ship can be, in this case 4%.

In short, the Tensor G6 will also include considerable improvements to its process node, even if it is not 2nm as previously rumored.

The use of these two process nodes shows that Google is getting very serious about its upcoming Tensor chips. The previous generations were always behind in terms of the technology they used, and using a modern process node is definitely a good step to make them more competitive.

This is the first part of the series where we will talk about the massive Pixel leak. We will be releasing more information soon, so stay tuned!